QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 228

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QG82945GSE S LB2R

Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
7.1.2
7.1.3
228
DID1 - Device Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register combined with the Vendor Identification register uniquely identifies any
PCI device.
NOTES:
1.
2.
PCICMD1 - PCI Command
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
15:11
15:0
Bit
Bit
10
9
Valid for all Mobile Intel 945 Express Chipsets except for the Mobile Intel 945GME/GSE
Valid for the Mobile Intel 945GME/GSE Express Chipset only.
Express Chipset.
Access
Access
R/W
RO
RO
RO
27A1h
27ADh
Default
Default
Value
Value
00h
0b
0b
1
2
Device Identification Number (DID1):
Identifier assigned to the (G)MCH Device 1 (virtual PCI-to-PCI
bridge, PCI Express* Graphics port).
Reserved
INTA Assertion Disable (INTAAD):
messages.
messages. Any INTA emulation interrupts already asserted must
be deasserted when this bit is set.
Only affects interrupts generated by the device (PCI INTA from a
PME or Hot Plug event) controlled by this command register. It
does not affect upstream MSIs, upstream PCI INTA-INTD assert
and deassert messages.
Fast Back-to-Back Enable (FB2B):
Not Applicable or Implemented. Hardwired to 0.
0: This device is permitted to generate INTA interrupt
1: This device is prevented from generating interrupt
PCI Express Graphics Device 1 Configuration Registers (D1:F0)
0/1/0/PCI
02-03h
27A1h
27ADh
RO
16 bits
0/1/0/PCI
04-05h
0000h
R/W; RO
16 bits
(Sheet 1 of 3)
1
2
Description
Description
Datasheet

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