QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 193

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Device 0 Memory Mapped I/O Register
6.5
Table 7.
6.5.1
6.5.1.1
Datasheet
C2 to C3 Transition Timer
C3 to C4 Transition Timer
Memory Interface Power
Management Control 4
Memory Interface Power
Management Control 5
Memory Interface Power
Management Control 6
Memory Interface Power
Management Control 7
Reserved
Power Management Configuration
Self-Refresh Channel Status
Reserved
Graphics Interface Power
Management Control 1
Reserved
Front Side Bus Power Management
Control 1
Reserved
Unit Power Management Control
Register 3
Reserved
ECO Bits
Register Name
Device 0 MCHBAR ACPI Power Management Control Registers
Device 0 MCHBAR ACPI Power Management
Controls
Power Management Mode Support Options
The Mobile Intel 945GM/GME/PM/GMS/GU/GSE, 943/940GML and Intel 945GT Express
Chipsets have added the capability to support C state power management modes. This
allows the option to support CPU PM from either the (G)MCH or ICH7M. Both cannot be
implemented at the same time. Below summarizes the difference between supporting
CPU states from (G)MCH.
(G)MCH CPU PM State Support (Enhanced)
• HCPUSLP# controlled by (G)MCH
• HCPUSLP# asserted in C2, C3 and C4
• PM_BM_BUSY# is not used
Register
FSBPMC1
Symbol
MIPMC4
MIPMC5
MIPMC6
MIPMC7
SLFRCS
GIPMC1
C2C3TT
C3C4TT
PMCFG
UPMC3
ECO
Register
Start
FBC
F00
F04
F08
F0A
F0C
F0E
F10
F14
F18
FB0
FB4
FB8
FC0
FC4
FFC
F0F
Register
End
F0B
F0D
FB7
FBB
FC3
F03
F07
F09
F0E
F0F
F13
F17
FB3
FBF
FFB
fAF
FFF
00000000h
00000000h
00000000h
00040000h
00000000h
00000000h
00000000h
00000000h
Default
Value
0000h
0000h
0000h
00h
R/WC; RO
R/W; RO
R/W; RO
R/W; RO
R/W; RO
R/W; RO
R/W; RO
R/W; RO
R/W; RO
R/W; RO
R/W; RO
Access
R/W
193