QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 118

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Table 4.
6.2.1
6.2.2
6.2.3
6.2.4
118
Group 5 Slew Rate Pull-down Table
Group 6 Slew Rate Pull-up Table
Group 6 Slew Rate Pull-down Table
Group 7 Slew Rate Pull-up Table
Group 7 Slew Rate Pull-down Table
Group 8 Slew Rate Pull-up Table
Group 8 Slew Rate Pull-down Table
Memory Interface Power
Management Control 3
Unit Power Management Control 4
Register Name
Device 0 MCHBAR Chipset Control Registers (Sheet 6 of 6)
FSBPMC3 Front Side Bus Power Management Control 3
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
FSBPMC4 Front Side Bus Power Management Control 4
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
FSBSNPCTL- FSB Snoop Control
B/D/F/Type:
Address Offset:
Default Value:
SLPCTL – CPU Sleep Timing Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
G5SRPDT
G6SRPUT
G6SRPDT
G7SRPUT
G7SRPDT
G8SRPUT
G8SRPDT
MIPMC3
UPMC4
Register
Symbol
0/0/0/MCHBAR
40-43h
00000000h
R/W; RO
32 bits
0/0/0/MCHBAR
44-47h
00000000h
R/W; RO
32 bits
0/0/0/MCHBAR
48-4Bh
00000000h
0/0/0/MCHBAR
90-93h
00005055h
R/W; RO
32 bits
620
640
660
680
6A0
6C0
6E0
BD8
C30
Register
Start
63F
65F
67F
69F
6BF
6DF
6FF
BDB
C33
Register
End
Device 0 Memory Mapped I/O Register
00000000h
00000000h
Default
Value
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W/L; RO
R/W;mi
Access
Datasheet