QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 215
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
- Current page: 215 of 482
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Device 0 Memory Mapped I/O Register
6.7.4
Datasheet
EPVC0RCAP - EP VC 0 Resource Capability
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:24
22:16
14:8
7:0
Bit
23
15
Access
RO
RO
RO
RO
RO
RO
Default
Value
00h
00h
00h
01h
0b
0b
Reserved
Reserved
Reserved
Reject Snoop Transactions (RSNPT):
the TLP header are allowed on this VC.
TLP header will be rejected as an Unsupported Request.
Reserved
Port Arbitration Capability (PAC):
Indicates types of Port Arbitration supported by this VC0
resource.
0: Transactions with or without the No Snoop bit set within
1: Any transaction without the No Snoop bit set within the
0/0/0/EPBAR
10-13h
00000001h
RO
32 bits
Description
215
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