QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 305

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Internal Graphics Device 2 Configuration Register (D2:F0-F1)
8.2.9
8.2.10
Datasheet
HDR2 - Header Type
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the Header Type of the IGD.
MMADR - Memory Mapped Range Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register requests allocation for the IGD registers and instruction ports. The
allocation is for 512 KB and the base address is defined by bits [31:19].
31:19
18:4
6:0
2:1
Bit
Bit
7
3
0
Access
Access
R/W
RO
RO
RO
RO
RO
RO
Default
Default
0000h
0000h
Value
Value
00h
00b
1b
0b
0b
Multi Function Status (MFunc):
Indicates if the device is a Multi-Function Device. The Value of
this register is determined by Device 0, offset 54h, DEVEN[4]. If
Device 0 DEVEN[4] is set, the MFunc bit is also set.
Header Code (H):
This is a 7-bit value that indicates the Header Code for the IGD.
This code has the value 00h, indicating a type 0 configuration
space format.
Memory Base Address:
Set by the OS, these bits correspond to address signals [31:19].
Address Mask:
Hardwired to 0’s to indicate 512-KB address range.
Prefetchable Memory:
Hardwired to 0 to prevent prefetching.
Memory Type:
Hardwired to 0’s to indicate 32-bit address.
Memory / IO Space:
Hardwired to 0 to indicate memory space.
0/2/1/PCI
Eh
80h
RO
8 bits
0/2/1/PCI
10-13h
00000000h
R/W; RO
32 bits
Description
Description
305