QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 48

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

2.5.3
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LVDS Signals
LADATAP[2:0]
LADATAN[2:0]
LA_CLKP
LA_CLKN
LBDATAP[2:0]
LBDATAN[2:0]
LB_CLKP
LB_CLKN
LVDD_EN
LBKLT_EN
LBKLT_CTL
LIBG
LVREFH
LVREFL
LVBG
Signal Name
LDVS Channel B (Not on the Intel® 945GU Express Chipset)
HVCMOS
HVCMOS
HVCMOS
Type
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
I/O
Ref
Ref
Ref
O
O
O
O
O
O
O
O
O
O
O
O
A
I
I
LFP Panel Power and Backlight Control
Channel A differential data output – positive
Channel A differential data output – negative
Channel A differential clock output – positive
Channel A differential clock output – negative
Channel B differential data output – positive
Channel B differential data output – negative
Channel B differential clock output – positive
Channel B differential clock output – negative
LVDS panel power enable: Panel power control enable control.
This signal is also called VDD_DBL in the CPIS specification and is
used to control the VDC source to the panel logic.
LVDS backlight enable: Panel backlight enable control.
This signal is also called ENA_BL in the CPIS specification and is
used to gate power into the backlight circuitry.
Note: The accuracy of the PWM duty cycle of L_BKLT_CTL signal
for any given value will be within ±20 ns.
Panel backlight brightness control: Panel brightness control.
This signal is also called VARY_BL in the CPIS specification and is
used as the PWM Clock input signal.
LVDS Reference Current.
1.5 kΩ pull-down resistor needed
Reserved - Must be connected to ground.
Reserved - Must be connected to ground.
Reserved - No connect
LVDS Reference Signals
LVDS Reference Signals
LDVS Channel A
Description
Signal Description
Datasheet