QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 311
QG82945GSE S LB2R
Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
1.AU80586GE025DSLB73.pdf
(482 pages)
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Internal Graphics Device 2 Configuration Register (D2:F0-F1)
8.2.21
8.2.22
Datasheet
BSM - Base of Stolen Memory
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Graphics Stolen Memory and TSEG are within DRAM space defined under TOLUD. From
the top of low used DRAM, (G)MCH claims 1 to 64 MBs of DRAM for internal graphics if
enabled.
PMCAPID - Power Management Capabilities ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
31:20
19:0
15:8
7:0
Bit
Bit
Access
Access
RO
RO
RO
RO
Default
Default
00000h
Value
Value
078h
00h
01h
Base of Stolen Memory (BSM):
This register contains bits 31 to 20 of the base address of stolen
DRAM memory. The host interface determines the base of
graphics stolen memory by subtracting the graphics stolen
memory size from TOLUD. See Device 0 TOLUD for more
explanations.
Reserved
NEXT_PTR:
This contains a pointer to next item in capabilities list. This is the
final capability in the list and must be set to 00h.
CAP_ID:
SIG defines this ID is 01h for power management.
0/2/1/PCI
5C-5Fh
07800000h
RO
32 bits
0/2/1/PCI
D0-D1h
0001h
RO
16 bits
Description
Description
311
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