QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 206

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

6.6.9
206
DMIVC1RCTL1 - DMI VC1 Resource Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register controls the resources associated with PCI Express Virtual Channel 1.
30:27
26:24
23:20
19:17
Bit
31
Access
R/W
R/W
R/W
RO
RO
Default
Value
001b
000b
0b
0h
0h
Virtual Channel 1 Enable (VC1E):
Software must use the VC Negotiation Pending bit to check
whether the VC negotiation is complete. When VC Negotiation
Pending bit is cleared, a 1 read from this VC Enable bit
indicates that the VC is enabled (Flow Control Initialization is
completed for the PCI Express* port). A 0 read from this bit
indicates that the Virtual Channel is currently disabled.
BIOS Requirement:
Virtual Channel must be set in both Components on a link.
Virtual Channel must be cleared in both Components on a link.
Channel at the time it is disabled.
Components on a link before re-enabling the Virtual Channel.
Reserved
Virtual Channel 1 ID (VC1ID):
Assigns a VC ID to the VC resource. Assigned value must be
non-zero. This field can not be modified when the VC is already
enabled.
Reserved
Port Arbitration Select (PAS):
Configures the VC resource to provide a particular Port
Arbitration service. Valid value for this field is a number
corresponding to one of the asserted bits in the Port Arbitration
Capability field of the VC resource.
1. To enable a Virtual Channel, the VC Enable bits for that
2. To disable a Virtual Channel, the VC Enable bits for that
4. Software must fully disable a Virtual Channel in both
3. Software must ensure that no traffic is using a Virtual
0: Virtual Channel is disabled.
1: Virtual Channel is enabled. See exceptions below.
0/0/0/DMIBAR
20-23h
01000000h
R/W; RO
32 bits
Description
Device 0 Memory Mapped I/O Register
Datasheet