QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 359

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Functional Description
Figure 17.
10.3.2.2
Datasheet
PCI Express*
Graphics
Internal
Logic
SDVO Conceptual Block Diagram
Concurrent SDVO/PCIe Operation
The Mobile Intel 945GM/GME and Intel 945GT Express Chipset variant supports concur-
rent operation of the SDVO port with video capture via x1 PCIe interface. Note that the
only type of data supported over the x1 PCIe link is video capture.
The PCI Express lanes comprise a standard PCI Express link and must always originate
with lane 0 on the PCI Express connector. The only supported PCIe width when SDVO is
present is x1.
This concurrency is supported in reversed and non-reversed configurations. Mirroring /
Reversing are always about the axis between lanes 7 and 8. When SDVO is reversed,
SDVO lane 0 corresponds to what would be PCIe pin/connector lane 15 (mirrored to
higher lane numbers).
Hardware reset straps are used to determine which of the six configurations below is
desired.
Control Clock
Analog RGB
Control Data
TV Clock In
Interrupt
GreenC
GreenB
ClockC
ClockB
RedC
BlueC
BlueB
RedB
Stall
SDVO External
Third Party
Device(s)
Device(s) or TV
Digital Display
Monitor
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