D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 16

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

2.8
2.9
Section 3 MCU Operating Modes
3.1
3.2
3.3
3.4
Section 4 Exception Handling
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
Rev. 3.00 Mar 17, 2006 page xiv of l
2.7.8
2.7.9
Processing States............................................................................................................... 55
Usage Note........................................................................................................................ 56
2.9.1
Operating Mode Selection ................................................................................................ 57
Register Descriptions ........................................................................................................ 58
3.2.1
3.2.2
Operating Mode Descriptions ........................................................................................... 61
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
3.3.6
3.3.7
3.3.8
3.3.9
3.3.10 Mode 12 ............................................................................................................... 63
3.3.11 Mode 13 ............................................................................................................... 63
3.3.12 Mode 14 ............................................................................................................... 63
3.3.13 Mode 15 ............................................................................................................... 63
3.3.14 Pin Functions ....................................................................................................... 63
Memory Map in Each Operating Mode ............................................................................ 65
Exception Handling Types and Priority ............................................................................ 75
Exception Sources and Exception Vector Table ............................................................... 75
Reset.................................................................................................................................. 77
4.3.1
4.3.2
4.3.3
Traces................................................................................................................................ 80
Interrupts ........................................................................................................................... 80
Trap Instruction................................................................................................................. 81
Stack Status after Exception Handling.............................................................................. 82
Usage Note........................................................................................................................ 83
Memory Indirect—@@aa:8 ................................................................................ 51
Effective Address Calculation ............................................................................. 53
Usage Notes on Bit-wise Operation Instructions ................................................. 56
Mode Control Register (MDCR) ......................................................................... 59
System Control Register (SYSCR) ...................................................................... 59
Mode 1 ................................................................................................................. 61
Mode 2 ................................................................................................................. 61
Mode 3 ................................................................................................................. 61
Mode 4 ................................................................................................................. 61
Mode 5 ................................................................................................................. 62
Mode 6 ................................................................................................................. 62
Mode 7 ................................................................................................................. 62
Mode 10 ............................................................................................................... 63
Mode 11 ............................................................................................................... 63
Reset exception handling ..................................................................................... 77
Interrupts after Reset............................................................................................ 79
On-Chip Peripheral Functions after Reset Release .............................................. 79
......................................................................................... 75
.................................................................................. 57