D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 189
![MCU 3V 0K I-TEMP 144-QFP](/photos/28/61/286116/144-lqfp__plqp0144kc-a_sml.jpg)
D12674RVFQ33D
Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet
1.D12674RVFQ33V.pdf
(981 pages)
Specifications of D12674RVFQ33D
Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D
HD6412674RVFQ33D
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 189 of 981
- Download datasheet (6Mb)
Bit
10
9
8
7
to
3
2
1, 0
Bit Name
ICIS0
WDBE
WAITE
—
ICIS2
—
Initial Value
1
0
0
0
0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Idle Cycle Insert 0
When an external read cycle and external write
cycle are performed consecutively, an idle cycle
can be inserted between the bus cycles.
0: Idle cycle not inserted
1: Idle cycle inserted
Write Data Buffer Enable
The write data buffer function can be used for
an external write cycle or DMAC single address
transfer cycle.
0: Write data buffer function not used
1: Write data buffer function used
WAIT Pin Enable
Selects enabling or disabling of wait input by
the WAIT pin.
0: Wait input by WAIT pin disabled
1: Wait input by WAIT pin enabled
Reserved
These are readable/writable bits, but the write
value should always be 0.
Idle Cycle Insert 2
When an external write cycle and external read
cycle are performed consecutively, an idle cycle
can be inserted between the bus cycles.
0: Idle cycle not inserted
1: Idle cycle inserted
Note: Bit 2 is a reserved bit in the H8S/2678
Reserved
These bits can be read from or written to.
However, the write value should always be 0.
WAIT pin can be used as I/O port
Rev. 3.00 Mar 17, 2006 page 137 of 926
Group. This bit is readable/writable, but
the write value should always be 0.
Section 6 Bus Controller (BSC)
REJ09B0283-0300
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