D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 551

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.12.5 Pin Functions
Port D pins also function as data I/Os. The correspondence between the register specification and
the pin functions is shown below.
Note:
10.12.6 Port D Input Pull-Up MOS States
Port D has a built-in input pull-up MOS function that can be controlled by software. This input
pull-up MOS function can be used in modes 3 * and 7. Input pull-up MOS can be specified as on
or off on a bit-by-bit basis.
In modes 3 * and 7, when a PDDDR bit is cleared to 0, setting the corresponding PDPCR bit to 1
turns on the input pull-up MOS for that pin.
Note: * Only in H8S/2678R Group.
Table 10.5 summarizes the input pull-up MOS states.
Table 10.5 Input Pull-Up MOS States (Port D)
Legend:
OFF:
On/Off: On when PDDDR = 0 and PDPCR = 1; otherwise off.
Note:
1, 2, 4, 5, 6
3 * , 7
Operating
mode
EXPE
PDDDR
Pin function
PD7/D15, PD6/D14, PD5/D13, PD4/D12, PD3/D11, PD2/D10, PD1/D9, PD0/D8
The pin function is switched as shown below according to the operating mode, bit EXPE, and
bit PDDDR.
Mode
* Only in H8S/2678R Group.
* Only in H8S/2678R Group.
Input pull-up MOS is always off.
1, 2, 4, 5, 6
Data I/O
Off
Reset
PD input
Off
Standby Mode
0
Hardware
0
PD output
3 * , 7
1
Rev. 3.00 Mar 17, 2006 page 499 of 926
Off
On/Off
Standby Mode
Software
Data I/O
1
Section 10 I/O Ports
Off
On/Off
REJ09B0283-0300
Operations
In Other

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