D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 302

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 6 Bus Controller (BSC)
6.11
This LSI can release the external bus in response to a bus request from an external device. In the
external bus released state, internal bus masters except the EXDMAC continue to operate as long
as there is no external access. If any of the following requests are issued in the external bus
released state, the BREQO signal can be driven low to output a bus request externally.
Rev. 3.00 Mar 17, 2006 page 250 of 926
REJ09B0283-0300
When an internal bus master wants to perform an external access
When a refresh request is generated
When a SLEEP instruction is executed to place the chip in software standby mode or all-
module-clocks-stopped mode
External space
write
Figure 6.83 Example of Timing when Write Data Buffer Function is Used
Bus Release
Internal address bus
Internal read signal
HWR, LWR
D15 to D0
A23 to A0
CSn
T
1
On-chip memory read Internal I/O register read
T
Internal memory
2
External write cycle
External address
T
W
Internal I/O register address
T
W
T
3

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