D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 207

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

Table 6.2
(n = 0 to 7)
Read Strobe Timing: RDNCR can be used to select either of two negation timings (at the end of
the read cycle or one half-state before the end of the read cycle) for the read strobe (RD) used in
the basic bus interface space.
Chip Select (CS
time and hold time between address and CS signals and strobe signals such as RD, HWR, and
LWR. CSACR can be used to insert states in which only the CS, AS, and address signals are
asserted before and after a basic bus space access cycle.
ABWCR
ABWn
0
1
ASTCR
ASTn
0
1
0
1
Bus Specifications for Each Area (Basic Bus Interface)
CS
CS
CS) Assertion Period Extension States: Some external I/O devices require a setup
Wn2
—
0
1
—
0
1
WTCRA, WTCRB
Wn1
—
0
1
0
1
—
0
1
0
1
—
0
1
0
1
0
1
0
1
—
0
1
0
1
0
1
0
1
Wn0
Bus Width
16
8
Bus Specifications (Basic Bus Interface)
Rev. 3.00 Mar 17, 2006 page 155 of 926
Section 6 Bus Controller (BSC)
Access
States
2
3
2
3
REJ09B0283-0300
Program Wait
States
0
0
1
2
3
4
5
6
7
0
0
1
2
3
4
5
6
7