D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 730

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

Section 15 Serial Communication Interface (SCI, IrDA)
15.3.8
SCMR selects Smart Card interface mode and its format.
Bit
7
to
4
3
2
1
0
Rev. 3.00 Mar 17, 2006 page 678 of 926
REJ09B0283-0300
Bit Name
—
SDIR
SINV
—
SMIF
Smart Card Mode Register (SCMR)
Initial Value
All 1
0
0
1
0
R/W
—
R/W
R/W
—
R/W
Description
Reserved
These bits are always read as 1.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: LSB-first in transfer
1: MSB-first in transfer
The bit setting is valid only when the transfer data
format is 8 bits. For 7-bit data, LSB-first is fixed.
Smart Card Data Invert
Specifies inversion of the data logic level. The
SINV bit does not affect the logic level of the
parity bit. To invert the parity bit, invert the O/E bit
in SMR.
0: TDR contents are transmitted as they are.
1: TDR contents are inverted before being
Reserved
This bit is always read as 1.
Smart Card Interface Mode Select
This bit is set to 1 to make the SCI operate in
Smart Card interface mode.
0: Normal asynchronous mode or clocked
1: Smart card interface mode
Receive data is stored as it is in RDR.
transmitted. Receive data is stored in inverted
form in RDR.
synchronous mode