D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 330

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 7 DMA Controller (DMAC)
Bit
7
Rev. 3.00 Mar 17, 2006 page 278 of 926
REJ09B0283-0300
DMABCRL
Bit Name
DTME1
Initial Value
0
R/W
R/W
Description
Data Transfer Master Enable 1
Together with the DTE1 bit, this bit controls
enabling or disabling of data transfer on
channel 1. When both the DTME1 bit and DTE1
bit are set to 1, transfer is enabled for channel
1.
If channel 1 is in the middle of a burst mode
transfer when an NMI interrupt is generated, the
DTME1 bit is cleared, the transfer is interrupted,
and bus mastership passes to the CPU. When
the DTME1 bit is subsequently set to 1 again,
the interrupted transfer is resumed. In block
transfer mode, however, the DTME1 bit is not
cleared by an NMI interrupt, and transfer is not
interrupted.
[Clearing conditions]
[Setting condition]
When 1 is written to DTME1 after reading
DTME1 = 0
When initialization is performed
When NMI is input in burst mode
When 0 is written to the DTME1 bit

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