D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 385

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

7.7.5
DREQ pin falling edge detection is performed in synchronization with DMAC internal operations.
The operation is as follows:
[1] Activation request wait state: Waits for detection of a low level on the DREQ pin, and
[2] Transfer wait state: Waits for DMAC data transfer to become possible, and switches to [3].
[3] Activation request disabled state: Waits for detection of a high level on the DREQ pin, and
After DMAC transfer is enabled, a transition is made to [1]. Thus, initial activation after transfer is
enabled is performed on detection of a low level.
switches to [2].
switches to [1].
Internal write signal
Internal read signal
Activation by Falling Edge on DREQ
External address
Figure 7.41 Example in Which Low Level Is Not Output at TEND
Internal address
HWR, LWR
TEND
DREQ
DREQ Pin
DREQ
External write by CPU, etc.
Not output
DMA
read
Rev. 3.00 Mar 17, 2006 page 333 of 926
Section 7 DMA Controller (DMAC)
DMA
write
TEND
TEND
TEND Pin
REJ09B0283-0300