D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 683

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
13.3.4
TCR selects the clock source and the time at which TCNT is cleared, and controls interrupts.
Bit
7
6
5
4
3
2
1
0
Bit Name
CMIEB
CMIEA
OVIE
CCLR1
CCLR0
CKS2
CKS1
CKS0
Timer Control Register (TCR)
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Compare Match Interrupt Enable B
Selects whether CMFB interrupt requests
(CMIB) are enabled or disabled when the
CMFB flag in TCSR is set to 1.
0: CMFB interrupt requests (CMIB) are disabled
1: CMFB interrupt requests (CMIB) are enabled
Compare Match Interrupt Enable A
Selects whether CMFA interrupt requests
(CMIA) are enabled or disabled when the
CMFA flag in TCSR is set to 1.
0: CMFA interrupt requests (CMIA) are disabled
1: CMFA interrupt requests (CMIA) are enabled
Timer Overflow Interrupt Enable
Selects whether OVF interrupt requests (OVI)
are enabled or disabled when the OVF flag in
TCSR is set to 1.
0: OVF interrupt requests (OVI) are disabled
1: OVF interrupt requests (OVI) are enabled
Counter Clear 1 and 0
These bits select the method by which TCNT is
cleared
00: Clearing is disabled
01: Clear by compare match A
10: Clear by compare match B
11: Clear by rising edge of external reset input
Clock Select 2 to 0
These bits select the clock input to TCNT and
count condition. See table 13.2.
Rev. 3.00 Mar 17, 2006 page 631 of 926
Section 13 8-Bit Timers (TMR)
REJ09B0283-0300

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