D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 536

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

Section 10 I/O Ports
10.9.1
The individual bits of PADDR specify input or output for the pins of port A. PADDR cannot be
read; if it is, an undefined value will be read.
Note:
Rev. 3.00 Mar 17, 2006 page 484 of 926
REJ09B0283-0300
Bit
7
6
5
4
3
2
1
0
Bit Name
PA7DDR
PA6DDR
PA5DDR
PA4DDR
PA3DDR
PA2DDR
PA1DDR
PA0DDR
* Only in H8S/2678R Group.
Port A Data Direction Register (PADDR)
Initial Value
0
0
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
Description
Pins PA4 to PA0 are address outputs regardless of
the PADDR settings.
For pins PA7 to PA5, when the corresponding bit of
A23E to A21E is set to 1, setting a PADDR bit to 1
makes the corresponding port A pin an address
output, while clearing the bit to 0 makes the pin an
input port. Clearing one of bits A23E to A21E to 0
makes the corresponding port A pin an I/O port, and
its function can be switched with PADDR.
When the corresponding bit of A23E to A16E is set
to 1, setting a PADDR bit to 1 makes the
corresponding port A pin an address output, while
clearing the bit to 0 makes the pin an input port.
Clearing one of bits A23E to A16E to 0 makes the
corresponding port A pin an I/O port, and its function
can be switched with PADDR.
When the corresponding bit of A23E to A16E is set
to 1, setting a PADDR bit to 1 makes the
corresponding port A pin an address output, while
clearing the bit to 0 makes the pin an input port.
Clearing one of bits A23E to A16E to 0 makes the
corresponding port A pin an I/O port; setting the
corresponding PADDR bit to 1 makes the pin an
output port, while clearing the bit to 0 makes the pin
an input port.
Port A is an I/O port, and its pin functions can be
switched with PADDR.
Modes 1, 2, 5, and 6
Mode 4
Modes 3 * and 7 (when EXPE = 1)
Modes 3 * and 7 (when EXPE = 0)