D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 761

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

15.6
Figure 15.14 shows the general format for clocked synchronous communication. In clocked
synchronous mode, data is transmitted or received in synchronization with clock pulses. One
character of communication data consists of 8-bit data. In clocked synchronous serial
communication, data on the transmission line is output from one falling edge of the serial clock to
the next. In clocked synchronous mode, the SCI receives data in synchronization with the rising
edge of the serial clock. After 8-bit data is output, the transmission line holds the MSB state. In
clocked synchronous mode, no parity or multiprocessor bit is added. Inside the SCI, the
transmitter and receiver are independent units, enabling full-duplex communication by use of a
common clock. Both the transmitter and the receiver also have a double-buffered structure, so that
data can be read or written during transmission or reception, enabling continuous data transfer.
15.6.1
Either an internal clock generated by the on-chip baud rate generator or an external
synchronization clock input at the SCK pin can be selected, according to the setting of CKE1 and
CKE0 bits in SCR. When the SCI is operated on an internal clock, the serial clock is output from
the SCK pin. Eight serial clock pulses are output in the transfer of one character, and when no
transfer is performed the clock is fixed high.
Figure 15.14 Data Format in Clocked Synchronous Communication (For LSB-First)
Note: * High except in continuous transfer
Clock
Operation in Clocked Synchronous Mode
Serial
Serial
clock
data
Don’t care
*
LSB
Bit 0
Bit 1
One unit of transfer data (character or frame)
Bit 2
Section 15 Serial Communication Interface (SCI, IrDA)
Bit 3
Bit 4
Rev. 3.00 Mar 17, 2006 page 709 of 926
Bit 5
Bit 6
MSB
Bit 7
REJ09B0283-0300
Don’t care
*