D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 248

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 6 Bus Controller (BSC)
or EXDMAC single address mode at the same time, these bits select whether or not burst access is
to be performed.
When DDS = 1 or EDDS = 1: Burst access is performed by determining the address only,
irrespective of the bus master. With the DRAM interface, the DACK or EDACK output goes low
from the T
Figure 6.41 shows the DACK or EDACK output timing for the DRAM interface when DDS = 1 or
EDDS = 1.
Rev. 3.00 Mar 17, 2006 page 196 of 926
REJ09B0283-0300
Figure 6.41 Example of DACK
Read
Write
Note: n = 2 to 5
c1
DACK or EDACK
state.
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
DACK/EDACK
DACK
DACK
(RAST = 0, CAST = 0)
T
EDACK Output Timing when DDS = 1 or EDDS = 1
EDACK
EDACK
p
Row address
High
High
T
r
T
c1
Column address
T
c2

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