D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 173

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

This LSI has an on-chip bus controller (BSC) that manages the external address space divided into
eight areas.
The bus controller also has a bus arbitration function, and controls the operation of the internal bus
mastership—the CPU, DMA controller (DMAC), EXDMA controller (EXDMAC), and data
transfer controller (DTC).
6.1
Note: * The Synchronous DRAM interface is not supported in the H8S/2678 Group.
BSCS202A_010020020400
Manages external address space in area units
Manages the external address space divided into eight areas of 2 Mbytes
Bus specifications can be set independently for each area
Burst ROM, DRAM, or synchronous DRAM * interface can be set
Basic bus interface
Chip select signals (CS0 to CS7) can be output for areas 0 to 7
8-bit access or 16-bit access can be selected for each area
2-state access or 3-state access can be selected for each area
Program wait states can be inserted for each area
Burst ROM interface
Burst ROM interface can be set independently for areas 0 and 1
DRAM interface
DRAM interface can be set for areas 2 to 5
Synchronous DRAM interface
Continuous synchronous DRAM space can be set for areas 2 to 5
Bus arbitration function
Includes a bus arbiter that arbitrates bus mastership between the CPU, DMAC, and DTC
Features
Section 6 Bus Controller (BSC)
Rev. 3.00 Mar 17, 2006 page 121 of 926
Section 6 Bus Controller (BSC)
REJ09B0283-0300