D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 851

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Notes: 1. Prewriting (setting erase block data to all 0) is not necessary.
2. The values of x, y, z, , , , , , , and N are shown in section 24.6, Flash Memory Characteristics.
3. Verify data is read in 16-bit (W) units.
4. Set only one bit in EBR1or EBR2. More than one bit cannot be set.
5. Erasing is performed in block units. To erase a number of blocks, the individual blocks must be erased sequentially.
Increment
address
NG
Figure 19.11 Erase/Erase-Verify Flowchart
NG
Set block start address to verify address
H'FF dummy write to verify address
Clear ESU bit in FLMCR1
Clear SWE bit in FLMCR1
Set SWE bit in FLMCR1
*
Set ESU bit in FLMCR1
Clear EV bit in FLMCR1
Clear E bit in FLMCR1
5
Set EV bit in FLMCR1
Last address of block?
Set E bit in FLMCR1
erasing of all erase
Verify data = all 1?
Set EBR1, EBR2
Read verify data
End of erasing
Disable WDT
Enable WDT
Wait (z) ms
Wait ( ) s
Wait ( ) s
Wait (x) s
Wait (y) s
Wait ( ) s
Wait ( ) s
Wait ( ) s
Wait ( ) s
blocks?
End of
n = 1
Start
OK
OK
OK
*
1
*
2
NG
*
*
*
*
Start of erase
*
Halt erase
*
*
*
*
*
2
Section 19 Flash Memory (F-ZTAT Version)
2
4
2
2
2
2
2
2
3
Rev. 3.00 Mar 17, 2006 page 799 of 926
Clear SWE bit in FLMCR1
Clear EV bit in FLMCR1
Erase failure
Wait ( ) s
Wait ( ) s
n
N?
OK
*
2
REJ09B0283-0300
NG
*
2
n
*
2
n + 1

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