D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 199

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

Bit
9
8
7 to 4
3
2
1
0
Bit Name
RCD1
RCD0
—
CKSPE
—
RDXC1
RDXC0
Initial Value
0
0
All 0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
RAS-CAS Wait Control
These bits select a wait cycle to be inserted
between the RAS assert cycle and CAS assert
cycle. A 1- to 4-state wait cycle can be inserted.
00: Wait cycle not inserted
01: 1-state wait cycle inserted
10: 2-state wait cycle inserted
11: 3-state wait cycle inserted
Reserved
These bits can be read from or written to.
However, the write value should always be 0.
Clock Suspend Enable
Enables clock suspend mode for extend read
data during DMAC and EXDMAC single
address transfer with the synchronous DRAM
interface.
0: Disables clock suspend mode
1: Enables clock suspend mode
Reserved
This bit can be read from or written to.
However, the write value should always be 0.
Read Data Extension Cycle Number Selection
Selects the number of read data extension
cycle (Tsp) insertion state in clock suspend
mode. These bits are valid when the CKSPE bit
is set to 1.
00: Inserts 1state
01: Inserts 2state
10: Inserts 3state
11: Inserts 4state
Rev. 3.00 Mar 17, 2006 page 147 of 926
Section 6 Bus Controller (BSC)
REJ09B0283-0300