D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 193

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

Bit
5
4
3
Bit Name
DDS
EDDS
—
Initial Value
0
0
0
R/W
R/W
R/W
R/W
Description
DMAC Single Address Transfer Option
Selects whether full access is always performed
or burst access is enabled when DMAC single
address transfer is performed on the
DRAM/synchronous DRAM interface.
When the BE bit is cleared to 0 in DRAMCR,
disabling DRAM/synchronous DRAM burst
access, DMAC single address transfer is
performed in full access mode regardless of the
setting of this bit.
This bit has no effect on other bus master
external accesses or DMAC dual address
transfers.
0: Full access is always executed
1: Burst access is enabled
EXDMAC Single Address Transfer Option
Selects whether full access is always performed
or burst access is enabled when EXDMAC
single address transfer is performed on the
DRAM/synchronous DRAM interface.
When the BE bit is cleared to 0 in DRAMCR,
disabling DRAM/synchronous DRAM burst
access, EXDMAC single address transfer is
performed in full access mode regardless of the
setting of this bit.
This bit has no effect on other bus master
external accesses or EXDMAC dual address
transfers.
0: Full access is always executed
1: Burst access is enabled
Reserved
This bit can be read from or written to.
However, the write value should always be 0.
Rev. 3.00 Mar 17, 2006 page 141 of 926
Section 6 Bus Controller (BSC)
REJ09B0283-0300