HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 128

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
5.3
The interrupt sources include external interrupts (NMI, IRQ
5.3.1
There are seven external interrupts: NMI and IRQ
can be used to exit software standby mode.
NMI: NMI is the highest-priority interrupt and is always accepted, regardless of the states of the I
and UI bits in CCR*. The NMIEG bit in SYSCR selects whether an interrupt is requested by the
rising or falling edge of the input at the NMI pin. NMI interrupt exception handling has vector
number 7.
Note: * NMI input is sometimes disabled when flash memory is being programmed or erased. For
IRQ
The IRQ
Figure 5.2 shows a block diagram of interrupts IRQ
IRQn
Note: n = 5 to 0
ISCR settings can select whether an interrupt is requested by the low level of the input at pins
IRQ
IER settings can enable or disable the IRQ
assigned by four bits in IPRA (IPRA7 to IPRA4).
The status of IRQ
to 0 by software.
0
to IRQ
input
0
details see section 18.4.5, Flash Vector Address Control Register (FVACR).
0
to IRQ
Interrupt Sources
External Interrupts
to IRQ
5
Interrupts: These interrupts are requested by input signals at pins IRQ
5
, or by the falling edge.
5
interrupts have the following features.
Figure 5.2 Block Diagram of Interrupts IRQ
0
to IRQ
5
sense circuit
Edge/level
interrupt requests is indicated in ISR. The ISR flags can be cleared
IRQnSC
Clear signal
0
to IRQ
0
to IRQ
0
to IRQ
5
S
R
interrupts. Interrupt priority levels can be
IRQnF
5
. Of these, NMI, IRQ
5
0
.
to IRQ
Q
Rev. 2.0, 06/04, page 99 of 980
IRQnE
5
) and 36 internal interrupts.
0
to IRQ
5
0
, IRQ
IRQn interrupt
request
0
1
, and IRQ
to IRQ
5
.
2

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