HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 286
![MCU 5V 512K,PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
HD64F3029XBL25V
Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3029X25.pdf
(1012 pages)
Specifications of HD64F3029XBL25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 286 of 1012
- Download datasheet (5Mb)
Port
Port 9
Port A
Port B
Description
6-bit I/O port
8-bit I/O port
Schmitt inputs
8-bit I/O port
Pins
P9
/SCK
P9
/SCK
P9
P9
P9
P9
PA
TIOCB
PA
TIOCA
PA
TIOCB
PA
TIOCA
PA
TIOCB
TCLKD
PA
TIOCA
TCLKC
PA
TCLKB
/TEND
PA
TCLKA
/TEND
PB
RXD
PB
TXD
PB
SCK
PB
UCAS
PB
TMIO
DREQ
PB
TMO
PB
TMIO
DREQ
PB
TMO
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
/IRQ
/IRQ
/RxD
/RxD
/TxD
/TxD
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
2
2
2
2
0
1
0
/LCAS
3
/CS
1
/CS
/
/
1
0
1
0
2
2
1
1
0
0
7
6
5
4
3
2
1
0
15
14
13
12
11
/CS
10
9
/CS
8
/A
/A
/A
/A
/
/
/
/
/
/
/
/
/
/
/
/
5
4
1
0
1
0
/
/
/
/
/
/
5
7
20
21
22
23
4
6
Mode 1
Input and output (SCK
(SCI1/0), IRQ
Output (TP
grammable timing
pattern controller (TPC),
input or output (TIOCB
for 16-bit timer and
generic input/output
TPC output (TP
16-bit timer input and
output (TIOCA
TIOCA
input/output
TPC output (TP
TCLKA), 8-bit timer input (TCLKD, TCLKC, TCLKB, TCLKA), output (TEND
controller (DMAC), and generic input/output
TPC output (TP
interface output (LCAS, UCAS), and generic input/output
TPC output (TP
TMO
input/output
0
), DMAC input (DREQ
1
) , and generic
7
) from pro-
Mode 2
5
2
and IRQ
, TIOCB
6
3
15
11
to TP
to TP
to TP
to TP
1
4
0
2
, SCK
),
), 16-bit timer input and output (TIOCB
12
8
4
1
)
), 8-bit timer input and output (TMIO
,
), SCI2 input and output (SCK
input, and 6-bit generic input/output
Mode 3
Address output
(A
TPC output (TP
output (TIOCA
output (A
1
, DREQ
Expanded Modes
0
20
, RxD
)
1
, RxD
23
0
), CS
to A
Mode 4
2
0
, TIOCB
21
, TxD
7
6
), and generic input/output
to CS
to TP
1
, TxD
4
4
),16-bit timer input and
1
output, and generic
, TIOCA
Mode 5
Address output (A
TPC output (TP
input or output
(TIOCB
timer, and generic
input/output
0
) for serial communication interfaces 1 and 0
2
Rev. 2.0, 06/04, page 257 of 980
, RxD
1
), address
3
, TMO
2
2
) for 16-bit
, TxD
0
, TIOCA
2
2
, TMIO
), DRAM
7
),
0
, TCLKD, TCLKC, TCLKB,
20
),
1
,
1
, TEND
Mode 7
TPC output (TP
timer input or output
(TIOCB
input/output
TPC output (TP
16-bit timer input and
output (TIOCA
TIOCA
input/output
TPC output (TP
TP
output (SCK
TxD
input/output
TPC output (TP
8-bit timer input and
output (TMIO
TMIO
input (DREQ
and generic input/output
Single-Chip Modes
12
), SCI2 input and
2
), and generic
0
1
) from DMA
, TMO
1
) and generic
2
), and generic
2
0
1
, RxD
), DMAC
3
, DREQ
, TMO
2
, TIOCB
7
6
15
11
), 16-bit
to TP
to
to TP
2
,
2
,
0
),
4
),
8
1
),
,
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