HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 688

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The methods for checking of received data are listed below.
(1) Input frequency
(2) Multiplication ratio
(3) Operating frequency error
(4) Bit rate
When the new bit rate is selectable, the rate will be set in the register after sending ACK in
response. The host will send an ACK with the new bit rate for confirmation and the boot program
will response with that rate.
Confirmation H'06
Response
The sequence of new bit-rate selection is shown in figure 18.26.
Received data check
The received value of the input frequency is checked to ensure that it is within the range of
minimum to maximum frequencies which matches the clock modes of the specified device.
When the value is out of this range, an input-frequency error is generated.
The received value of the multiplication ratio or division ratio is checked to ensure that it
matches the clock modes of the specified device. When the value is out of this range, an
input-frequency error is generated.
Operating frequency is calculated from the received value of the input frequency and the
multiplication or division ratio. The input frequency is input to the LSI and the LSI is
operated at the operating frequency. The expression is given below.
Operating frequency = Input frequency
Operating frequency = Input frequency
The calculated operating frequency should be checked to ensure that it is within the range of
minimum to maximum frequencies which are available with the clock modes of the specified
device. When it is out of this range, an operating frequency error is generated.
Peripheral operating clock ( ), bit rate (B), clock select (CKS) in the serial mode register
(SMR).
The error as calculated by the method below is checked to ensure that it is less than 4%. When
it is 4% or more, a bit-rate selection error is generated.
Confirmation, H'06, (1 byte) : Confirmation of a new bit rate
Response, H'06, (1 byte) : Response to confirmation of a new bit rate
H'06
Error (%) = {[
(N+1)
Multiplication ratio , or
Division ratio
B
64
10
6
2
(2 n-1)
] –1} 100
Rev. 2.0, 06/04, page 659 of 980