HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 653

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
The details of the erasing procedure are described below. The procedure program must be
executed in an area other than the user MAT to be erased. Especially the part where the SCO bit in
FCCS is set to 1 for downloading must be executed in on-chip RAM.
The area that can be executed in the steps of the user procedure program (on-chip RAM, user
MAT, and external space) is shown in section 18.10.3, Procedure Program and Storable Area for
Programming Data.
For the downloaded on-chip program area, refer to the RAM map for programming/erasing in
figure 18.10, RAM Map when Programming/Erasing is Executed.
A single divided block is erased by one erasing processing. For block divisions, refer to figure
18.4, Block Division of User MAT. To erase two or more blocks, update the erase block number
and perform the erasing processing for each block.
(a) Select the on-chip program to be downloaded
The procedures to be carried out after setting FKEY, e.g. download and initialization, are the same
as those in the programming procedure. For details, refer to Programming Procedure in User
Program Mode in section 18.5.2.
(b) Set the FEBS parameter necessary for erasure
(c) Erasure
MOV.L
JSR
NOP
Rev. 2.0, 06/04, page 624 of 980
Set the EPVB bit in FECS to 1.
Several programming/erasing programs cannot be selected at one time. If several programs are
set, download is not performed and a download error is returned to the source select error
detect (SS) bit in the DPFR parameter.
Set the erase block number of the user MAT in the flash erase block select parameter FEBS
(general register ER0). If a value other than an erase block number of the user MAT is set, no
block is erased even though the erasing program is executed, and an error is returned to the
return value parameter FPFR.
Similar to as in programming, there is an entry point of the erasing program in the area from
(download start address set by FTDAR) + 16 bytes of on-chip RAM. The subroutine is called
and erasing is executed by using the following steps.
#DLTOP+16,ER2
@ER2
The general registers other than R0L are saved in the erasing program.
R0 is a return value of the FPFR parameter.
Since the stack area is used in the erasing program, a stack area of a maximum 128
bytes must be reserved in RAM
; Set entry address to ER2
; Call erasing routine

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