HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 355

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Bit 5—Input Capture/Compare Match Interrupt Enable A1 (IMIEA1): Enables or disables
the interrupt requested by the IMFA1 flag when IMFA1 is set to 1.
Bit 5
IMIEA1
0
1
Bit 4—Input Capture/Compare Match Interrupt Enable A0 (IMIEA0): Enables or disables
the interrupt requested by the IMFA0 flag when IMFA0 is set to 1.
Bit 4
IMIEA0
0
1
Bit 3—Reserved: This bit cannot be modified and is always read as 1.
Bit 2—Input Capture/Compare Match Flag A2 (IMFA2): This status flag indicates GRA2
compare match or input capture events.
Bit 2
IMFA2
0
1
Rev. 2.0, 06/04, page 326 of 980
Description
IMIA1 interrupt requested by IMFA1 flag is disabled
IMIA1 interrupt requested by IMFA1 flag is enabled
Description
IMIA0 interrupt requested by IMFA0 flag is disabled
IMIA0 interrupt requested by IMFA0 flag is enabled
Description
[Clearing condition]
Read IMFA2 flag when IMFA2 =1, then write 0 in IMFA2 flag
[Setting conditions]
16TCNT2 = GRA2 when GRA2 functions as an output compare register
16TCNT2 value is transferred to GRA2 by an input capture signal when GRA2
functions as an input capture register
(Initial value)
(Initial value)
(Initial value)

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