HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 661

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 18.10 Software Protection
Item
Protection by the
SCO bit
Protection by the
FKEY register
Emulation
protection
18.6.3
Error protection is a mechanism for aborting programming or erasure when an error occurs, in the
form of the microcomputer entering runaway during programming/erasing of the flash memory or
operations that are not according to the established procedures for programming/erasing. Aborting
programming or erasure in such cases prevents damage to the flash memory due to excessive
programming or erasing.
If the microcomputer malfunctions during programming/erasing of the flash memory, the FLER
bit in the FCCS register is set to 1 and the device enters the error-protection state, and this aborts
the programming or erasure.
The FLER bit is set in the following conditions:
(1) When an interrupt, such as NMI, has occurred during programming/erasing
(2) When the relevant block area of flash memory is read during programming/erasing (including
(3) When a SLEEP instruction (including software standby mode) is executed during
(4) When a bus master other than the CPU, such as DMAC or BREQ, has obtained the bus right
Rev. 2.0, 06/04, page 632 of 980
a vector read or an instruction fetch)
programming/erasing
during programming/erasing
Error Protection
Description
Clearing the SCO bit in the FCCS
register makes the device enter a
program/erase-protected state, and
this disables the downloading of the
programming/erasing programs.
Downloading and
programming/erasing are disabled
unless the required key code is
written in the FKEY register.
Different key codes are used for
downloading and for
programming/erasing.
Setting the RAMS bit in the RAM
emulation register (RAMER) makes
the device enter a program/erase-
protected state.
Download
Function to be Protected
Program/Erase