HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 580

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.2.3
ADCR is an 8-bit readable/writable register that enables or disables starting of A/D conversion by
external trigger input or an 8-bit timer compare match signal. ADCR is initialized to H'7E by a
reset and in standby mode.
Bit 7—Trigger Enable (TRGE): Enables or disables starting of A/D conversion by an external
trigger or 8-bit timer compare match.
External trigger pin and 8-bit timer selection are performed by the 8-bit timer. For details, see
section 10, 8-Bit Timers.
Bits 6 to 3—Reserved: These bits cannot be modified and are always read as 1.
Bit 2, 1—Reserved: These bits can be read or written, but must not be set to 0.
Bit 0—Reserved: This bit can be read or written, but must not be set to 1.
Bit 7
TRGE
0
1
Bit
Initial value
Read/Write
A/D Control Register (ADCR)
Description
Starting of A/D conversion by an external trigger or 8-bit timer
compare match is disabled
A/D conversion is started at the falling edge of the external trigger
signal (ADTRG) or by an 8-bit timer compare match
Trigger enable
Enables or disables starting of A/D conversion
by an external trigger or 8-bit timer compare match
TRGE
R/W
7
0
—
—
6
1
—
—
5
1
—
—
4
1
Reserved bits
—
—
3
1
Rev. 2.0, 06/04, page 551 of 980
R/W
—
2
1
R/W
—
1
1
(Initial value)
R/W
—
0
0