HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 504

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 2
TEND
0
1
For smart card interface (SMIF bit in SCMR set to 1): Indicates that when the last bit of a
serial character was transmitted TDR did not contain valid transmit data, so transmission has
ended. The TEND flag is a read-only bit and cannot be written.
Bit 2
TEND
0
1
Note: etu: Elementary time unit (time required to transmit one bit)
Bit 1—Multiprocessor bit (MPB): Stores the value of the multiprocessor bit in the receive data
when a multiprocessor format is used in asynchronous mode. MPB is a read-only bit, and cannot
be written.
Bit 1
MPB
0
1
Note:
* If the RE bit in SCR is cleared to 0 when a multiprocessor format is selected, MPB
retains its previous value.
Description
Transmission is in progress
[Clearing conditions]
Read TDRE when TDRE = 1, then write 0 in TDRE
The DMAC writes data in TDR
End of transmission
[Setting conditions]
The chip is reset or enters standby mode
The TE bit in SCR is cleared to 0
TDRE is 1 when the last bit of a 1-byte serial transmit character is transmitted
Description
Transmission is in progress
[Clearing conditions]
Read TDRE when TDRE = 1, then write 0 in TDRE
The DMAC writes data in TDR
End of transmission
[Setting conditions]
The chip is reset or enters standby mode
The TE bit is cleared to 0 in SCR and the FER/ERS bit is also cleared to 0
TDRE is 1 and FER/ERS is 0 (normal transmission) 2.5 etu (when GM = 0) or
1.0 etu (when GM = 1) after a 1-byte serial character is transmitted
Description
Multiprocessor bit value in receive data is 0*
Multiprocessor bit value in receive data is 1
Rev. 2.0, 06/04, page 475 of 980
(Initial value)
(Initial value)
(Initial value)