HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 195

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 6.9
Operating Mode
Modes 1 and 2
(1-Mbyte)
Modes 3, 4, and 5
(16-Mbyte)
Note: n = 2 to 5
RAS Down Mode and RAS Up Mode: With DRAM provided with fast page mode, as long as
accesses are to the same row address, burst operation can be continued without interruption even
if accesses are not consecutive by holding the RAS signal low.
Rev. 2.0, 06/04, page 166 of 980
RAS Down Mode
To select RAS down mode, set the BE and RDM bits to 1 in DRCRA. If access to DRAM
space is interrupted and another space is accessed, the RAS signal is held low during the
access to the other space, and burst access is performed if the row address of the next DRAM
space access is the same as the row address of the previous DRAM space access. Figure 6.23
shows an example of the timing in RAS down mode.
Correspondence between Settings of MXC1 and MXC0 Bits and ABWCR, and
Row Address Compared in Burst Access
0
1
0
1
MXC1
DRCRB
MXC0
0
1
0
1
0
1
0
1
ABWCR
ABWn
0
1
0
1
0
1
—
0
1
0
1
0
1
—
Bus Width
16 bits
8 bits
16 bits
8 bits
16 bits
8 bits
—
16 bits
8 bits
16 bits
8 bits
16 bits
8 bits
—
Compared Row Address
A19 to A9
A19 to A8
A19 to A10
A19 to A9
A19 to A11
A19 to A10
Illegal setting
A23 to A9
A23 to A8
A23 to A10
A23 to A9
A23 to A11
A23 to A10
Illegal setting