HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 71

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.6.5
The BSET, BCLR, BNOT, BST, and BIST instructions read a byte of data, modify a bit in the
byte, then write the byte back. Care is required when these instructions are used to access registers
with write-only bits, or to access ports.
Step
1
2
3
Example 1: BCLR is executed to clear bit 0 in the port 4 data direction register (P4DDR) under
the following conditions.
P4
P4
The intended purpose of this BCLR instruction is to switch P4
Before Execution of BCLR Instruction
Input/output
DDR
Rev. 2.0, 06/04, page 42 of 980
Operation field only
Operation field and register fields
Operation field, register fields, and effective address extension
Operation field, effective address extension, and condition field
7
5
, P4
– P4
6
:
Read
Modify
Write
0
op
: Output pins
Notes on Use of Bit Manipulation Instructions
Input pins
P4
Input
0
7
op
op
Read one data byte at the specified address
Modify one bit in the data byte
Description
Write the modified data byte back to the specified address
P4
Input
0
cc
6
EA (disp)
Figure 2.9 Instruction Formats
op
P4
Output
1
5
rn
rn
P4
Output
1
EA (disp)
4
P4
Output
1
3
rm
rm
0
from output to input.
P4
Output
1
2
NOP, RTS, etc.
ADD.B Rn, Rm, etc.
MOV.B @(d:16, Rn), Rm
BRA d:8
P4
Output
1
1
P4
Output
1
0