HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 366

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

When bit TPSC2 is cleared to 0 an internal clock source is selected, and the timer counts only
falling edges. When bit TPSC2 is set to 1 an external clock source is selected, and the timer counts
the edges selected by bits CKEG1 and CKEG0.
When channel 2 is set to phase counting mode (MDF = 1 in TMDR), the settings of bits TPSC2 to
TPSC0 in 16TCR2 are ignored. Phase counting takes precedence.
9.2.10
TIOR is an 8-bit register. The 16-bit timer has three TIORs, one in each channel.
Channel Abbreviation Function
0
1
2
Each TIOR is an 8-bit readable/writable register that selects the output compare or input capture
function for GRA and GRB, and specifies the functions of the TIORA and TIORB pins. If the
output compare function is selected, TIOR also selects the type of output. If input capture is
selected, TIOR also selects the edges of the input capture signal.
TIOR is initialized to H'88 by a reset and in standby mode.
Bit 7—Reserved: This bit cannot be modified and is always read as 1.
Bit
Initial value
Read/Write
Timer I/O Control Register (TIOR)
TIOR0
TIOR1
TIOR2
Reserved bit
—
—
7
1
TIOR controls the general registers. Some functions differ in PWM
mode.
I/O control B2 to B0
These bits select GRB functions
IOB2
R/W
6
0
IOB1
R/W
5
0
IOB0
R/W
4
0
Reserved bit
—
—
3
1
Rev. 2.0, 06/04, page 337 of 980
IOA2
R/W
I/O control A2 to A0
These bits select GRA
functions
2
0
IOA1
R/W
1
0
IOA0
R/W
0
0