HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 923

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8TCSR2—Timer Control/Status Register 2
8TCSR3—Timer Control/Status Register 3
Rev. 2.0, 06/04, page 894 of 980
TCSR2
TCSR3
Initial value
Read/Write
Initial value
Read/Write
Note: * Only 0 can be written to bits 7 to 5, to clear these flags.
Bit
Bit
Compare match/input capture flag B
0
1
R/(W)*
R/(W)*
CMFB
CMFB
[Clearing condition]
[Setting conditions]
Read CMFB when CMFB = 1, then write 0 in CMFB
TCNT = TCORB
The TCNT value is transferred to TCORB by an input capture signal when
TCORB functions as an input capture register.
7
0
7
0
Compare match flag A
0
1
R/(W)*
R/(W)*
CMFA
CMFA
[Setting condition]
[Clearing condition]
Read CMFA when CMFA = 1, then write 0 in CMFA
TCNT = TCORA
6
0
6
0
Timer overflow flag
0
1
R/(W)*
R/(W)*
OVF
OVF
[Clearing condition]
[Setting condition]
5
0
5
0
Read OVF when OVF = 1, then write 0 in OVF
TCNT overflows from H'FF to H'00
Input capture enable (TCSR3 only)
0
1
R/W
ICE
4
1
4
0
TCORB is a compare match register
TCORB is an input capture register
TCSR3
Output/input capture edge select B3 and B2
ICE in
0
1
OIS3
OIS3
R/W
R/W
3
0
3
0
Bit 3
OIS3
0
1
0
1
Bit 1
Output select A1 and A0
OS1
H'FFF92
H'FFF93
OIS2
OIS2
Bit 3
OIS2
R/W
R/W
0
1
2
0
2
0
0
1
0
1
0
1
0
Bit 0
OS0
0
1
0
1
No change at compare match B
0 output at compare match B
1 output at compare match B
Output toggles at compare match
B
TCORB input capture on rising
edge
TCORB input capture on falling
edge
TCORB input capture on both
rising and falling edges
OS1
R/W
OS1
R/W
No change at compare match A
0 output at compare match A
1 output at compare match A
Output toggles at compare
match A
1
0
1
0
Description
OS0
R/W
OS0
R/W
Description
8-bit timer channel 2
8-bit timer channel 3
0
0
0
0