HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 153

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Bit 5—Address 21 Enable (A21E): Enables PA
Writing 0 in this bit enables A
be modified and PA
Bit 5
A21E
0
1
Bit 4—Address 20 Enable (A20E): Enables PA
Writing 0 in this bit enables A
Bit 4
A20E
0
1
Bits 3 to 1—Reserved: These bits cannot be modified and are always read as 1.
Bit 0—Bus Release Enable (BRLE): Enables or disables release of the bus to an external device.
Bit 0
BRLE
0
1
6.2.5
BCR is an 8-bit readable/writable register that enables or disables idle cycle insertion, selects the
address map, selects the area division unit, and enables or disables WAIT pin input.
BCR is initialized to H'C6 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Rev. 2.0, 06/04, page 124 of 980
Bit
Initial value
Read/Write
Bus Control Register (BCR)
ICIS1
R/W
7
1
Description
PA
PA
Description
PA
PA
Description
The bus cannot be released to an external device
BREQ and BACK can be used as input/output pins
The bus can be released to an external device
6
has its ordinary port functions.
6
6
7
7
is the A
is an input/output pin
is the A
is an input/output pin (Initial value when in mode 1, 2, 5, or 7)
ICIS0
R/W
6
1
21
20
21
20
output from PA
output from PA
address output pin
address output pin (Initial value when in mode 3 or 4)
BROME BRSTS1
R/W
5
0
6
7
. In modes other than 3, 4, and 5, this bit cannot
. This bit can only be modified in mode 5.
6
7
R/W
4
0
to be used as the A
to be used as the A
BRSTS0
R/W
3
0
21
20
EMC
R/W
2
1
address output pin.
address output pin.
RDEA
R/W
1
1
(Initial value)
(Initial value)
WAITE
R/W
0
0

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