HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 240

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.3.4
The data transfer control registers (DTCRs) are 8-bit readable/writable registers that control the
operation of the DMAC channels. A channel operates in full address mode when bits DTS2A and
DTS1A are both set to 1 in DTCRA. DTCRA and DTCRB have different functions in full address
mode.
DTCRA
DTCRA is initialized to H'00 by a reset and in standby mode.
Bit
Initial value
Read/Write
Data transfer enable
Enables or disables
data transfer
Data Transfer Control Registers (DTCR)
DTE
R/W
7
0
Data transfer size
Selects byte or
word size
DTSZ
R/W
6
0
Source address
increment/decrement
Source address increment/
decrement enable
These bits select whether
the source address register
(MARA) is incremented,
decremented, or held fixed
during the data transfer
SAID
R/W
5
0
SAIDE
R/W
Data transfer
interrupt enable
Enables or disables the
CPU interrupt at the end
of the transfer
4
0
DTIE
R/W
3
0
Rev. 2.0, 06/04, page 211 of 980
DTS2A
R/W
Data transfer select
2A and 1A
These bits must both be
set to 1
2
0
DTS1A
R/W
1
0
Data transfer
select 0A
Selects block
transfer mode
DTS0A
R/W
0
0