HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 621

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Bit 7
FWE
0
1
Bits 6 and 5—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 4—Flash Memory Error (FLER): Indicates an error occurs during programming and erasing
flash memory.
When FLER is set to 1, flash memory enters the error protection state.
This bit is initialized at a power-on reset or in hardware standby mode.
When FLER is set to 1, high voltage is applied to the internal flash memory. To reduce the
damage to flash memory, the reset must be released after the reset period of 100 s which is
longer than normal.
Bit 4
FLER
0
1
Bits 3 to 1—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 0—Source Program Copy Operation (SCO): Requests the on-chip programming/erasing
program to be downloaded to the on-chip RAM.
When this bit is set to 1, the on-chip program which is selected by FPCS/FECS is automatically
downloaded in the on-chip RAM area specified by FTDAR.
In order to set this bit to 1, RAM emulation state must be canceled, H'A5 must be written to
FKEY, and this operation must be in the on-chip RAM.
Four NOP instructions must be executed immediately after setting this bit to 1.
Since this bit is cleared to 0 when download is completed, this bit cannot be read as 1.
All interrupts are prohibited during programming and erasing. Interrupts must not occur in the
user system.
Rev. 2.0, 06/04, page 592 of 980
Description
When the FWE pin goes low (in hardware protection state)
When the FWE pin goes high
Description
Flash memory operates normally
Programming/erasing protection for flash memory (error protection) is invalid.
[Clearing condition] At a power-on reset or in hardware standby mode
Indicates an error occurs during programming/erasing flash memory.
Programming/erasing protection for flash memory (error protection) is valid.
[Setting condition] See section 18.6.3, Error Protection.
(Initial value)

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