HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 187

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Table 6.5
DRAS2 DRAS1 DRAS0 Area 5
0
1
Note:
6.5.3
When DRAM space is accessed, the row address and column address are multiplexed. The
address multiplexing method is selected with bits MXC1 and MXC0 in DRCRB according to the
number of bits in the DRAM column address. Table 6.6 shows the correspondence between the
settings of MXC1 and MXC0 and the address multiplexing method.
Rev. 2.0, 06/04, page 158 of 980
* A single CS
0
1
0
1
Address Multiplexing
CS
Settings of Bits DRAS2 to DRAS0 and Corresponding DRAM Space (RAS
Output Pin)
n
pins can be used as input/output ports.
0
1
0
1
0
1
0
1
n
pin serves as a common RAS output pin for a number of areas. Unused
Normal space
Normal space
Normal space
Normal space
Normal space
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
5
4
2
)
)*
)*
Area 4
Normal space
Normal space
Normal space
Normal space
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
4
4
4
2
)
)
)*
)*
Area 3
Normal space
Normal space
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
3
2
3
3
2
2
)
)*
)
)
)*
)*
Area 2
Normal space
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
DRAM space
(CS
2
2
2
2
2
2
2
)
)
)*
)
)
)*
)*
RAS
RAS
RAS

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