HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 312

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8.9.2
Table 8.13 summarizes the registers of port 8.
Table 8.13 Port 8 Registers
Address*
H'EE007
H'FFFD7
Note:
Port 8 Data Direction Register (P8DDR): P8DDR is an 8-bit write-only register that can select
input or output for each pin in port 8.
Bits 7 to 5 are reserved. They are fixed at 1, and cannot be modified.
Modes 1 to 5 (Expanded Modes): When bits in P8DDR bit are set to 1, P8
CS
However, P8
DRAS0 in DRAM control register A (DRCRA). For details see section 6.5.2, DRAM Space and
RAS Output Pin Settings.
In modes 1 to 4 (expanded modes with on-chip ROM disabled), following a reset P8
the CS
enabled), following a reset CS
When the refresh enable bit (RFSHE) in DRCRA is set to 1, P8
RFSHE is cleared to 0, P8
details see table 8.14.
Bit
Modes
1 to 4
Modes
5 and 7
3
output pins. When bits in P8DDR are cleared to 0, the corresponding pins become input ports.
0
* Lower 20 bits of the address in advanced mode.
output, while CS
Initial value
Read/Write
Initial value
Read/Write
Register Descriptions
Name
register
Port 8 data register
Port 8 data direction
1
can also be used as an output port, depending on the setting of bits DRAS2 to
—
—
—
7
1
1
1
to CS
0
becomes an input/output port according to the P8DDR setting. For
Reserved bits
0
to CS
3
are input ports. In mode 5 (expanded mode with on-chip ROM
—
—
—
6
1
1
3
Abbreviation
P8DDR
P8DR
are all input ports.
—
—
—
5
1
1
P8 DDR
4
W
W
4
1
0
R/W
W
R/W
P8 DDR
Port 8 data direction 4 to 0
These bits select input or
output for port 8 pins
3
W
W
3
0
0
0
Modes 1 to 4
H'F0
H'E0
is used for RFSH output. When
Rev. 2.0, 06/04, page 283 of 980
P8 DDR
2
W
W
2
0
0
Initial Value
4
to P8
P8 DDR
Modes 5 and 7
H'E0
H'E0
1
1
W
W
1
0
0
become CS
4
functions as
P8 DDR
0
W
W
0
0
0
0
to