HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 206

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Figure 6.33 Interconnections and Address Map for 2-CAS 4-Mbit DRAMs with
Figure 6.33 shows typical interconnections when using two 4-Mbit DRAMs, and the
corresponding address map. The DRAMs used in this example are of the 9-bit row address
9-bit column address type. In this example, upper address decoding allows multiple DRAMs
to be connected to a single area. The RFSH pin is used in this case, since both DRAMs must
be refreshed simultaneously. However, note that RAS down mode cannot be used in this
interconnection example.
H8/3029
Area 2
PB
PB
CS
4
5
RD (WE)
2
(UCAS)
(LCAS)
(RAS
D
RFSH
A
15
9
A
-D
-A
19
2
H'400000
H'47FFFE
H'480000
H'4FFFFE
H'500000
H'5FFFFE
1
0
)
(a) Interconnections (example)
(UCAS)
15
PB
(b) Address map
16-Mbyte mode
DRAM (No.1)
DRAM (No.2)
Organization
4
Not used
8
7
(LCAS)
PB
5
0
CS
9-bit row address x 9-bit column address
2
(RAS
RAS
UCAS
LCAS
WE
RAS
UCAS
LCAS
WE
A
A
D
D
2
8
8
)
2-CAS 4-Mbit DRAM
15
15
-A
-A
x16-bit organization
Rev. 2.0, 06/04, page 177 of 980
-D
-D
0
0
0
0
OE
OE
No.1
No.2
16-Bit

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