R88M-WP10030S-BWS1 Omron, R88M-WP10030S-BWS1 Datasheet - Page 110

• Manufacturer Part Number: R88M-WP10030S-BWS1
• Description: SERVO MOTOR 100W 100V W/BRAKE
• Manufacturer: Omron

Specifications of R88M-WP10030S-BWS1

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: R88MWP10030SBWS1

Standard Models and Specifications
When another torque limit function besides Pn404/Pn405 is enabled, the output torque is limited to the
lower of the values.
Note 1. This is the default allocation. Input terminal allocations (CN1 pins 40 to 46) can be changed by
Note 2. With the default allocation, the functions for pins 45 and 46 can be changed to PCL/NCL or
D Rotation Direction Command Input (41: RDIR)
This signal specifies the direction of rotation when operation is carried out at the internally set speed
(numbers 1 to 3). When this signal is OFF, the direction is forward; when it is ON, the direction is reverse.
Note 1. This is the default allocation. Input terminal allocations (CN1 pins 40 to 46) can be changed by
Note 2. With the default allocation, the function for pin 41 is changed to MING, PLOCK, TVSEL, RDIR,
D Speed Selection Command 1 (45: SPD1)
Refer to the table under Control Mode Switch (41: TVSEL) .
Note 1. This is the default allocation. Input terminal allocations (CN1 pins 40 to 46) can be changed by
Note 2. The control mode will change according to the status of the TVSEL signal when Pn50A.0 is
Note 3. With the default allocation, the functions for pin 45 and 46 can be changed to PCL/NCL or
D Control Mode Switch (41: TVSEL)
The SPD1 and SPD2 signals are enabled when Pn000.1 (function selection basic switch: control mode
selection) is set to any of the settings between 3 and 6.
The TVSEL signal is enabled when Pn000.1 is set to any of the settings between 4 and 9.
The control mode and internal speed set in Pn301 to Pn303 are changed using signal combinations, as
shown in the following table.
2-82
Speed Selection Command 2 (46: SPD2)
setting Pn50A.0 (input signal selection mode) to 1. The PCL signal is allocated by Pn50b.2,
and the NCL signal is allocated by Pn50b.3.
SPD1/SPD2 by means of the Pn000.1 (control mode selection) setting and the control mode
in operation. For details, refer to 4-4-3 Important Parameters .
setting Pn50A.0 (input signal selection mode) to 1. The RDIR signal is allocated by Pn50C.0.
or IPG according to the Pn000.1 (control mode selection) setting and the control mode in op-
eration. For details, refer to 4-4-3 Important Parameters .
setting Pn50A.0 (input signal selection mode) to 1. The SPD1 signal is allocated by Pn50C.1,
and the SPD2 signal is allocated by Pn50C.2.
set to 1.
SPD1/SPD2 by means of the Pn000.1 (control mode selection) setting and the control mode
in operation. For details, refer to 4-4-3 Important Parameters .
Chapter 2