NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 150

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.10.2
5.10.3
Table 56.
5.10.4
150
The mode that must first be entered when enabling the serial IRQ protocol is
continuous mode. In this mode, the ICH8 asserts the start frame. This start frame is 4,
6, or 8 PCI clocks wide based upon the Serial IRQ Control Register, bits 1:0 at 64h in
Device 31:Function 0 configuration space. This is a polling mode.
When the serial IRQ stream enters quiet mode (signaled in the Stop Frame), the
SERIRQ line remains inactive and pulled up between the Stop and Start Frame until a
peripheral drives the SERIRQ signal low. The ICH8 senses the line low and continues to
drive it low for the remainder of the Start Frame. Since the first PCI clock of the start
frame was driven by the peripheral in this mode, the ICH8 drives the SERIRQ line low
for 1 PCI clock less than in continuous mode. This mode of operation allows for a quiet,
and therefore lower power, operation.
Data Frames
Once the Start frame has been initiated, all of the SERIRQ peripherals must start
counting frames based on the rising edge of SERIRQ. Each of the IRQ/DATA frames has
exactly 3 phases of 1 clock each:
Stop Frame
After all data frames, a Stop Frame is driven by the ICH8. The SERIRQ signal is driven
low by the ICH8 for 2 or 3 PCI clocks. The number of clocks is determined by the
SERIRQ configuration register. The number of clocks determines the next mode:
Stop Frame Explanation
Specific Interrupts Not Supported via SERIRQ
There are three interrupts seen through the serial stream that are not supported by the
ICH8. These interrupts are generated internally, and are not sharable with other
devices within the system. These interrupts are:
• Sample Phase. During this phase, the SERIRQ device drives SERIRQ low if the
• Recovery Phase. During this phase, the device drives the SERIRQ line high if in
• Turn-around Phase. The device tri-states the SERIRQ line
• IRQ0. Heartbeat interrupt generated off of the internal 8254 counter 0.
• IRQ8#. RTC interrupt can only be generated internally.
• IRQ13. Floating point error interrupt generated off of the processor assertion of
Stop Frame Width
corresponding interrupt signal is low. If the corresponding interrupt is high, then
the SERIRQ devices tri-state the SERIRQ signal. The SERIRQ line remains high due
to pull-up resistors (there is no internal pull-up resistor on this signal, an external
pull-up resistor is required). A low level during the IRQ0–1 and IRQ2–15 frames
indicates that an active-high ISA interrupt is not being requested, but a low level
during the PCI INT[A:D], SMI#, and IOCHK# frame indicates that an active-low
interrupt is being requested.
the Sample Phase it was driven low. If it was not driven in the sample phase, it is
tri-stated in this phase.
FERR#.
2 PCI clocks
3 PCI clocks
Quiet Mode. Any SERIRQ device may initiate a Start Frame
Continuous Mode. Only the host (Intel
Frame
Next Mode
®
ICH8) may initiate a Start
Intel
®
Functional Description
ICH8 Family Datasheet