NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 317

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Gigabit LAN Configuration Registers
8.1.19
8.1.20
Intel
®
ICH8 Family Datasheet
CLIST 1—Capabilities List Register 1
(Gigabit LAN—D25:F0)
Address Offset: C8h–C9h
Default Value:
PMC—PCI Power Management Capabilities Register
(Gigabit LAN—D25:F0)
Address Offset: CAh
Default Value:
15:11
15:8
7:0
8:6
2:0
Bit
Bit
10
9
5
4
3
Next Capability (NEXT) — RO. Value of D0h indicates the location of the next pointer.
Capability ID (CID) — RO. Indicates the linked list item is a PCI Power Management
Register.
PME_Support (PMES) — RO. This five-bit field indicates the power states in which the
function may assert PME#. It depend on PM Ena and AUX-PWR bits in word 0Ah in the
NVM:
Condition
PM Ena=0
PM Ena & AUX-PWR=0
PM Ena & AUX-PWR=1
D2_Support (D2S) — RO. The D2 state is not supported.
D1_Support (D1S) — RO The D1 state is not supported.
Aux_Current (AC) — RO. Required current defined in the Data Register.
Device Specific Initialization (DSI) — RO. Set to 1. The Gb LAN Controller requires its
device driver to be executed following transition to the D0 un-initialized state.
Reserved
PME Clock (PMEC) — RO. Hardwired to ‘0’.
Version (VS) — RO. Hardwired to 010b to indicate support for Revision 1.1 of the PCI
Power Management Specification.
D001h
See bit descriptions
–
CBh
Functionality
No PME at all states
PME at D0 and D3hot
PME at D0, D3hot and D3cold
Description
Description
Attribute:
Size:
Attribute:
Size:
RO
16 bits
RO
16 bits
Value
00000b
01001b
11001b.
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