NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 496
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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12.1.53
.
12.1.54
Note:
496
SIRAC—SATA Indexed Registers Index ACh
(SATA Initialization Register ACh)
Address Offset: Index ACh - AFh
Default Value:
SATACR0—SATA Capability Register 0 (SATA–D31:F2)
Address Offset: A8h–ABh
Default Value:
This register shall be read-only 0 when CC.SCC is 01h.
31:24
23:20
19:16
31:0
15:8
Bit
7:0
Bit
BIOS programs this field to 0009000Ah.
Reserved
Major Revision (MAJREV) — RO: Major revision number of the SATA Capability Pointer
implemented.
Minor Revision (MINREV) — RO: Minor revision number of the SATA Capability Pointer
implemented.
Next Capability Pointer (NEXT) — RO: Points to the next capability structure. 00h
indicates this is the last capability pointer.
Capability ID (CAP)— RO: This value of 12h has been assigned by the PCI SIG to
designate the SATA Capability Structure.
00240005h
00100012h
Description
Description
Attribute:
Size:
Attribute:
Size:
SATA Controller Registers (D31:F2)
R/W
32 bits
RO
32 bits
Intel
®
ICH8 Family Datasheet
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