NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 798

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.2
21.2.1
21.2.2
21.2.3
798
Thermal Memory Mapped Configuration Registers
(Thermal Sensor - D31:F26)
The base memory for these thermal memory mapped configuration registers is
specified in the TBARB (D31:F6, Offset 40h). The individual registers are then
accessible at TBARB + Offset.
There are two sensors in the ICH8. Each sensor has a separate configuration register
set. Both sensors must be configured together.
TSxE—Thermal Sensor [1:0] Enable
Offset Address:
Default Value:
TSxS—Thermal Sensor[1:0] Status
Offset Address:
Default Value:
TSxTTP—Thermal Sensor [1:0] Catastrophic Trip Point
Offset Address:
Default Value:
31:8
7:0
6:0
7:0
Bit
Bit
Bit
7
Thermal Sensor Enable (TSE) — R/W. BIOS shall always program this register to the value BAh
to enable the thermal sensor.
All other values are reserved.
Catastrophic Trip Indicator (CTI) — RO.
1 = Temperature is above the catastrophic setting.
0 = Temperature is below the catastrophic setting.
Reserved
Reserved
Catastrophic Trip Point Setting (CTPS) — R/W. These bits set the catastrophic trip point.
BIOS must write a value of 0Ah to offset 04h and a value of 0Bh to offset 44h to set the trip point.
These bits are lockable via TSxCO.bit 7.
Sensor 0: TBARB+01h
Sensor 1: TBARB+41h
00h
Sensor 0: TBARB+02h
Sensor 1: TBARB+42h
00h
Sensor 0: TBARB+04h
Sensor 1: TBARB+44h
00h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Thermal Sensor Registers (D31:F6)
R/W
8 bit
RO
8 bit
R/W
32 bit
Intel
®
ICH8 Family Datasheet