NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 202

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.16.7
Note:
5.16.8
5.16.9
Note:
202
Serial ATA Reference Clock Low Power Request
(SATACLKREQ#)
The 100 MHz Serial ATA Reference Clock (SATACLKP, SATACLKN) is implemented on the
system as a ground-terminated low-voltage differential signal pair driven by the system
Clock Chip. When all the SATA links are in Slumber or disabled, the SATA Reference
Clock is not needed and may be stopped and tri-stated at the clock chip allowing
system-level power reductions.
The ICH8 uses the SATACLKREQ# output signal to communicate with the system Clock
Chip to request either SATA clock running or to tell the system clock chip that it can
stop the SATA Reference Clock. ICH8 drives this signal low to request clock running,
and tristates the signal to indicate that the SATA Reference Clock may be stopped (the
ICH8 never drives the pin high). When the SATACLKREQ# is tristated by the ICH8, the
clock chip may stop the SATA Reference Clock within 100 ns, anytime after 100 ns, or
not at all. If the SATA Reference Clock is not already running, it will start within 100 ns
after a SATACLKREQ# is driven low by the ICH8.
To enable SATA Reference Clock Low Power Request:
The reset default for SATACLKREQ# is low to ensure that the SATA Reference Clock is
running after system reset.
SGPIO Signals
The SGPIO signals, in accordance to the SFF-8485 specification, support per-port LED
signaling. These signals are not related to SATALED#, which allows for simplified
indication of SATA command activity. The SGPIO group interfaces with an external
controller chip that fetches and serializes the data for driving across the SGPIO bus.
The output signals then control the LEDs.
External SATA (Intel
ICH8 supports external SATA. External SATA uses the SATA interface outside of the
system box. The usage model for this feature must comply with the Serial ATA II
Cables and Connectors Volume 2 Gold specification at www.sata-io.org. Intel validates
two configurations:
Port multipliers are not supported on ICH8. There is no hot plugging of the OS host
device. Intel
1. Configure GPIO35 to native function
2. Set SATA Clock Request Enable (SCRE) bit to ‘1’ (Dev 31:F2:Offset 94h:bit 28).
1. The "cable-up" solution involves an internal SATA cable that connects to the SATA
2. The back-panel solution involves running a trace to the I/O back panel and
motherboard connector and spans to a back panel PCI bracket with an e-SATA
connector. A separate e-SATA cable is required to connect an e-SATA device.
connecting a device via an external SATA connector on the board.
®
Matrix Storage Technology must be present to support external SATA.
®
ICH8R, ICH8DH, and ICH8DO Only)
Intel
®
Functional Description
ICH8 Family Datasheet