NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 19

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Intel
®
ICH8 Family Datasheet
12.2
12.3
12.4
12.1.42SIR28—SATA Indexed Registers Index 28h
12.1.43SIR40—SATA Indexed Registers Index 40h
12.1.44STTT2—SATA Indexed Registers Index 74h
12.1.45SIR78—SATA Indexed Registers Index 78h
12.1.46SIR84—SATA Indexed Registers Index 84h
12.1.47SIR88—SATA Indexed Registers Index 88h
12.1.48SIR8C—SATA Indexed Registers Index 8Ch
12.1.49STTT3—SATA Indexed Registers Index 90h
12.1.50SIR94—SATA Indexed Registers Index 94h
12.1.51SIRA0—SATA Indexed Registers Index A0h
12.1.52SIRA8—SATA Indexed Registers Index A8h
12.1.53SIRAC—SATA Indexed Registers Index ACh
12.1.54SATACR0—SATA Capability Register 0 (SATA–D31:F2) .............................. 496
12.1.55SATACR1—SATA Capability Register 1 (SATA–D31:F2) .............................. 497
12.1.56ATC—APM Trapping Control Register (SATA–D31:F2) ................................ 498
12.1.57ATS—APM Trapping Status Register (SATA–D31:F2) ................................. 498
12.1.58SP Scratch Pad Register (SATA–D31:F2) ................................................. 498
12.1.59BFCS—BIST FIS Control/Status Register (SATA–D31:F2) ........................... 499
12.1.60BFTD1—BIST FIS Transmit Data1 Register (SATA–D31:F2) ........................ 501
12.1.61BFTD2—BIST FIS Transmit Data2 Register (SATA–D31:F2) ........................ 501
Bus Master IDE I/O Registers (D31:F2) .............................................................. 502
12.2.1 BMIC[P,S]—Bus Master IDE Command Register (D31:F2) .......................... 503
12.2.2 BMIS[P,S]—Bus Master IDE Status Register (D31:F2) ............................... 504
12.2.3 BMID[P,S]—Bus Master IDE Descriptor Table Pointer
12.2.4 AIR—AHCI Index Register (D31:F2) ........................................................ 509
12.2.5 AIDR—AHCI Index Data Register (D31:F2) .............................................. 510
Serial ATA Index/Data Pair Superset Registers .................................................... 510
12.3.1 SINDX—SATA Index Register (D31:F5) ................................................... 510
12.3.2 SDATA—SATA Index Data Register (D31:F5)............................................ 511
AHCI Registers (D31:F2) (Intel
ICH8M-E Only)................................................................................................ 512
12.4.1 AHCI Generic Host Control Registers (D31:F2) ......................................... 513
(SATA Initialization Register 28h) ........................................................... 493
(SATA Initialization Register 40h) ........................................................... 493
(SATA TX Termination Test Register 2).................................................... 493
(SATA Initialization Register 78h) ........................................................... 494
(SATA Initialization Register 84h) ........................................................... 494
(SATA Initialization Register 88h) ........................................................... 494
(SATA Initialization Register 8Ch) ........................................................... 494
(SATA TX Termination Test Register 3).................................................... 495
(SATA Initialization Register 94h) ........................................................... 495
(SATA Initialization Register A0h) ........................................................... 495
(SATA Initialization Register A8h) ........................................................... 495
(SATA Initialization Register ACh)........................................................... 496
Register (D31:F5) ................................................................................ 505
12.2.3.1 PxSSTS—Serial ATA Status Register (D31:F5) ............................ 505
12.2.3.2 PxSCTL — Serial ATA Control Register (D31:F5).......................... 507
12.2.3.3 PxSERR—Serial ATA Error Register (D31:F5) .............................. 508
12.4.1.1 CAP—Host Capabilities Register (D31:F2)................................... 513
12.4.1.2 GHC—Global ICH8 Control Register (D31:F2).............................. 515
12.4.1.3 IS—Interrupt Status Register (D31:F2) ...................................... 516
12.4.1.4 PI—Ports Implemented Register (D31:F2) .................................. 517
12.4.1.5 VS—AHCI Version (D31:F2) ..................................................... 518
12.4.1.6 CCC_CTL—Command Completion Coalescing Control
12.4.1.7 CCC_Ports—Command Completion Coalescing Ports
Register (D31:F2) ................................................................... 518
Register (D31:F2) ................................................................... 519
®
ICH8R, ICH8DH, ICH8DO, and
19